1. Field of the Invention
The present invention relates to an information storage apparatus, an information transfer method, an information transfer system, a program, and a storage medium. In particular, the present invention relates to an information storage apparatus, an information transfer method, an information transfer system, a program, and a storage medium, which can be used suitably for information transfer.
2. Description of the Related Art
A data processing apparatus to which a memory card or the like having a built-in memory has been used in the past (see Japanese Patent Laid-open No. 2004-46891, for example).
In the past, a direct memory access (DMA) controller has been used for data transfer between a host and a storage. Direct memory access refers to transferring data between memories or between a memory and an I/O device directly, without depending on a collection of machine language instructions. The DMA controller is a controller for controlling a DMA function.
There are two types of data transfer using the DMA function. In one type of data transfer, data is transferred using descriptors that describe data transfer control information, such as a data transfer address and a data transfer size. In the other type of data transfer, the descriptors are not used, and transfer information is directly written to a register or the like for the data transfer.
The transfer method involving the use of the descriptors is, for example, suitably used for data transfer in the case of, as in a memory system used in a personal computer or the like, a discrete physical address space managed on a page-by-page basis, i.e., in the case where pieces of information that are defined as being stored in a continuous logical address space are, in an actual physical address space, stored discretely (see FIG. 1). If the data transfer is carried out by directly writing the transfer information to the register or the like in the case as illustrated in FIG. 1, there arises a need to write the transfer information to the register at each interruption of the transfer, resulting in increased overhead in the transfer and possibly in a reduced transfer rate.
In contrast, in the case where the data transfer is carried out using the descriptors in an embedded system that is able to secure a continuous physical address space as well as the continuous logical address space, a transfer time necessary for automatically acquiring the descriptors becomes overhead in the transfer, which may result in a reduced transfer rate (see FIG. 2).
An exemplary data transfer in the related art will now be described below with reference to FIG. 3.
A host system 1 and a storage system 2 are connected to each other via a common bus 3.
A DMA controller 12 has set therein a data transfer mode, i.e., either a mode in which the data transfer is carried out using the descriptors or a mode in which the data transfer is carried out by directly writing the transfer information to the register or the like without using the descriptors.
When a data transfer instruction is accepted via an operation input section (not shown), a CPU 11 of the host system 1 supplies a command for starting DMA transfer to the DMA controller 12. Upon receipt of the command for starting the DMA transfer from the CPU 11, the DMA controller 12 acquires information concerning the data transfer based on its setting, and reads data from a storage memory 22 in the storage system 2 via an I/F 14, the common bus 3, and an I/F 23 and writes the read data to a memory 13, or performs an inverse operation. After completion of the transfer of data of a specified size, the DMA controller 12 uses an interrupt or the like to notify the CPU 11 of the completion.
As in the above example, the DMA controller 12 is generally mounted on the host system 1, and reads the data from the storage system 2 connected thereto via the common bus 3 and writes the read data to the memory 13, or performs the inverse operation, for example.
As an interface between the host system 1 and the storage system 2, a dedicated interface has been used in the past in some cases.
A high-speed bus called a Peripheral Components Interconnect (PCI) Express bus is widely used (see Japanese Patent Laid-open No. 2006-155183, for example).